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<title>Debugging with GDB: i386 Features</title>

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<a name="i386-Features"></a>
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<p>
Next: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="n" rel="next">MicroBlaze Features</a>, Previous: <a href="ARM-Features.html#ARM-Features" accesskey="p" rel="prev">ARM Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="i386-Features-1"></a>
<h4 class="subsection">G.5.3 i386 Features</h4>
<a name="index-target-descriptions_002c-i386-features"></a>

<p>The &lsquo;<samp>org.gnu.gdb.i386.core</samp>&rsquo; feature is required for i386/amd64
targets.  It should describe the following registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>eax</samp>&rsquo; through &lsquo;<samp>edi</samp>&rsquo; plus &lsquo;<samp>eip</samp>&rsquo; for i386
</li><li>- &lsquo;<samp>rax</samp>&rsquo; through &lsquo;<samp>r15</samp>&rsquo; plus &lsquo;<samp>rip</samp>&rsquo; for amd64
</li><li>- &lsquo;<samp>eflags</samp>&rsquo;, &lsquo;<samp>cs</samp>&rsquo;, &lsquo;<samp>ss</samp>&rsquo;, &lsquo;<samp>ds</samp>&rsquo;, &lsquo;<samp>es</samp>&rsquo;,
&lsquo;<samp>fs</samp>&rsquo;, &lsquo;<samp>gs</samp>&rsquo;
</li><li>- &lsquo;<samp>st0</samp>&rsquo; through &lsquo;<samp>st7</samp>&rsquo;
</li><li>- &lsquo;<samp>fctrl</samp>&rsquo;, &lsquo;<samp>fstat</samp>&rsquo;, &lsquo;<samp>ftag</samp>&rsquo;, &lsquo;<samp>fiseg</samp>&rsquo;, &lsquo;<samp>fioff</samp>&rsquo;,
&lsquo;<samp>foseg</samp>&rsquo;, &lsquo;<samp>fooff</samp>&rsquo; and &lsquo;<samp>fop</samp>&rsquo;
</li></ul>

<p>The register sets may be different, depending on the target.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.i386.sse</samp>&rsquo; feature is optional.  It should
describe registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>xmm0</samp>&rsquo; through &lsquo;<samp>xmm7</samp>&rsquo; for i386
</li><li>- &lsquo;<samp>xmm0</samp>&rsquo; through &lsquo;<samp>xmm15</samp>&rsquo; for amd64
</li><li>- &lsquo;<samp>mxcsr</samp>&rsquo;
</li></ul>

<p>The &lsquo;<samp>org.gnu.gdb.i386.avx</samp>&rsquo; feature is optional and requires the
&lsquo;<samp>org.gnu.gdb.i386.sse</samp>&rsquo; feature.  It should
describe the upper 128 bits of <small>YMM</small> registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>ymm0h</samp>&rsquo; through &lsquo;<samp>ymm7h</samp>&rsquo; for i386
</li><li>- &lsquo;<samp>ymm0h</samp>&rsquo; through &lsquo;<samp>ymm15h</samp>&rsquo; for amd64
</li></ul>

<p>The &lsquo;<samp>org.gnu.gdb.i386.mpx</samp>&rsquo; is an optional feature representing Intel
Memory Protection Extension (MPX).  It should describe the following registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>bnd0raw</samp>&rsquo; through &lsquo;<samp>bnd3raw</samp>&rsquo; for i386 and amd64.
</li><li>- &lsquo;<samp>bndcfgu</samp>&rsquo; and &lsquo;<samp>bndstatus</samp>&rsquo; for i386 and amd64.
</li></ul>

<p>The &lsquo;<samp>org.gnu.gdb.i386.linux</samp>&rsquo; feature is optional.  It should
describe a single register, &lsquo;<samp>orig_eax</samp>&rsquo;.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.i386.avx512</samp>&rsquo; feature is optional and requires the
&lsquo;<samp>org.gnu.gdb.i386.avx</samp>&rsquo; feature.  It should
describe additional <small>XMM</small> registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>xmm16h</samp>&rsquo; through &lsquo;<samp>xmm31h</samp>&rsquo;, only valid for amd64.
</li></ul>

<p>It should describe the upper 128 bits of additional <small>YMM</small> registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>ymm16h</samp>&rsquo; through &lsquo;<samp>ymm31h</samp>&rsquo;, only valid for amd64.
</li></ul>

<p>It should
describe the upper 256 bits of <small>ZMM</small> registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>zmm0h</samp>&rsquo; through &lsquo;<samp>zmm7h</samp>&rsquo; for i386.
</li><li>- &lsquo;<samp>zmm0h</samp>&rsquo; through &lsquo;<samp>zmm15h</samp>&rsquo; for amd64.
</li></ul>

<p>It should
describe the additional <small>ZMM</small> registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>zmm16h</samp>&rsquo; through &lsquo;<samp>zmm31h</samp>&rsquo;, only valid for amd64.
</li></ul>

<hr>
<div class="header">
<p>
Next: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="n" rel="next">MicroBlaze Features</a>, Previous: <a href="ARM-Features.html#ARM-Features" accesskey="p" rel="prev">ARM Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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